1.5 Data Transmission within a Computer System

Bus Architecture

Bus Architecture refers to the system of communication pathways used to transfer data and control signals between various components of a computer system. The main types of buses include:

• Data Bus: Carries the actual data being transferred between components.
• Address Bus: Carries the addresses of data in memory, specifying where the data should be read from or written to.
• Control Bus: Transmits control signals to manage the operations of the CPU, memory, and I/O devices.

The bus architecture functions similarly to a highway system, providing routes for data and control signals within the computer.

• System Buses:
  • Control Bus: Manages the flow of control signals to ensure coordinated operations among components.
  • Data Bus: Facilitates the transfer of data between the CPU, memory, and I/O devices.
  • Address Bus: Used to specify memory locations for data transfer.

Data Paths

Data Paths are internal pathways within the CPU that enable the movement of data between various functional units such as the Arithmetic Logic Unit (ALU), registers, and cache. Data paths are essential for performing operations on data, providing routes for data movement within the processor.

• Microprocessor Bus Architecture:
  • Internal Address Bus: Carries memory addresses within the CPU.
  • Internal Data Bus: Transfers data between the CPU's internal components.
  • Internal Control Bus: Delivers control signals within the CPU.

Registers

Registers are small, high-speed storage units within the CPU that temporarily hold data and instructions. They facilitate rapid data access and manipulation during processing. Key registers include:

• Memory Address Register (MAR): Holds the address of the data being accessed.
• Memory Data Register (MDR): Contains data being transferred to or from memory.
• Accumulator (AC): Stores intermediate results from arithmetic and logic operations.
• Program Counter (PC): Contains the address of the next instruction to be executed.
• Current Instruction Register (CIR): Holds the current instruction being processed.

Memory Hierarchy

Memory Hierarchy is a structured approach to data storage, aiming to balance speed and storage capacity. It consists of several levels:

• Cache Memory: Fast, small-sized memory close to the CPU for quick access to frequently used data.
• RAM (Random Access Memory): Larger but slower than cache memory, used for temporary data storage.
• Secondary Storage: Includes hard drives, SSDs, and other forms of long-term storage, which are slower but offer greater capacity.

Data is fetched from the highest level of the hierarchy first due to its faster access times.

Instruction Cycle

The Instruction Cycle is the process by which a computer executes a program's instructions. It involves:

• Fetching: Retrieving the next instruction from memory.
• Decoding: Interpreting the fetched instruction to determine the required operation.
• Executing: Performing the operation using the CPU’s ALU or other functional units.
• Storing: Saving the results back to memory or registers.

This cycle is also known as the fetch-decode-execute cycle.

Pipeline Processing

Pipeline Processing is a technique used in modern CPUs to enhance efficiency. It involves breaking down the execution of instructions into separate stages, with multiple instructions being processed simultaneously at different stages. This method improves CPU utilization and speeds up instruction execution.

Interrupts and I/O

Interrupts are signals that temporarily halt the current program’s execution to address urgent events or handle I/O operations. This allows the CPU to manage interactions with peripheral devices like keyboards, mice, and network interfaces effectively. When an interrupt occurs, the CPU pauses its current activities, processes the interrupt, and then resumes the previous task.